杭州机器视觉1394数字图像采集卡

所属分类：杭州1394采集卡
型号：FWB-PCIE1X20
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发布日期：2018/10/02
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详细介绍

FWB-PCIE1X20 2口2通道1394B

FWB-PCIE1X20 FWB-PCIE1X20采集卡 FWB-PCIE1X20 1394采集卡

台湾IOI FWB-PCIE1X21A LSI FW643 1394B采集卡800M工业视觉相机

视觉相机专用 LSI FW643 IOI 1394B

Introduction

FWB-PCIE1X11B is designed withTexas Instruments XIO2213B controller.

The Texas Instruments XIO2213B is a PCI Express to PCI translation bridge where the PCI bus interface isinternally connected to a 1394b open host controller link-layer controller with a three-port 1394b PHY. ThePCI-Express to PCI translation bridge is fully compatible with thePCI Express to PCI/PCI-X Bridge Specification,Revision 1.0. Also, the bridge supports the standard PCI-to-PCI bridge programming model. The 1394b OHCIcontroller function is fully compatible with IEEE Standard 1394b and the latest1394 Open Host ControllerInterface (OHCI)Specification.

Deep FIFOs are provided to buffer 1394 data and accommodate large host bus latencies. The device providesphysical write posting and a highly tuned physical data path for SBP-2 performance. The device is capable oftransferring data between the PCI Express bus and the 1394 bus at 100M bits/s, 200M bits/s, 400M bits/s, and800Mbits/s.

FWB-PCIE1X11B provides full PCI Express and 1394b functionality and performance.

Technical Specifications

PCI ExpressFull x1 PCI Express ThroughputFully Compliant with PCI Express Base Specification, Revision 1.1Utilizes 100-MHz Differential PCI Express Common Reference ClockOHCI Link and IEEE 1394 PHYFully supports provisions of IEEE P1394b-2002Fully Compliant With Provisions of IEEE Std 1394-1995 for a High-Performance Serial Bus and IEEE Std 1394a-2000Fully Compliant with 1394 Open Host Controller Interface Specification, Revision 1.1 and Revision 1.2 draftThree IEEE Std 1394b Fully Compliant Cable Ports at 100M Bits/s, 200M Bits/s, 400M Bits/s, and 800M Bits/sCable Ports Monitor Line Conditions for Active Connection To Remote NodeCable Power Presence MonitoringEEPROM Configuration Support to Load the Global Unique ID for the 1394 FabricActiveStateLink Power Management Saves Power When Packet Activity on the PCI Express Link is Idle, Using Both L0s and L1 StatesSupport for D1, D2, D3hotNumber of Ports:Three BilingualIEEE Std 1394b-2002Cable PortsBus Power Connector:Big IDE 4-pin DC Power ConnectorIntroductionFWB-PCIE1X12 is designed withTexas Instruments XIO2213B controller.The Texas Instruments XIO2213B is a PCI Express to PCI translation bridge where the PCI bus interface isinternally connected to a 1394b open host controller link-layer controller with a three-port 1394b PHY. ThePCI-Express to PCI translation bridge is fully compatible with thePCI Express to PCI/PCI-X Bridge Specification,Revision 1.0. Also, the bridge supports the standard PCI-to-PCI bridge programming model. The 1394b OHCIcontroller function is fully compatible with IEEE Standard 1394b and the latest1394 Open Host ControllerInterface (OHCI)Specification.Deep FIFOs are provided to buffer 1394 data and accommodate large host bus latencies. The device providesphysical write posting and a highly tuned physical data path for SBP-2 performance. The device is capable oftransferring data between the PCI Express bus and the 1394 bus at 100M bits/s, 200M bits/s, 400M bits/s, and800Mbits/s.FWB-PCIE1X12 provides full PCI Express and 1394b functionality and performance.Technical SpecificationsPCI ExpressFull x1 PCI Express ThroughputFully Compliant with PCI Express Base Specification, Revision 1.1Utilizes 100-MHz Differential PCI Express Common Reference ClockOHCI Link and IEEE 1394 PHYFully supports provisions of IEEE P1394b-2002Fully Compliant With Provisions of IEEE Std 1394-1995 for a High-Performance Serial Bus and IEEE Std 1394a-2000Fully Compliant with 1394 Open Host Controller Interface Specification, Revision 1.1 and Revision 1.2 draftThree IEEE Std 1394b Fully Compliant Cable Ports at 100M Bits/s, 200M Bits/s, 400M Bits/s, and 800M Bits/sCable Ports Monitor Line Conditions for Active Connection To Remote NodeCable Power Presence MonitoringEEPROM Configuration Support to Load the Global Unique ID for the 1394 FabricActiveStateLink Power Management Saves Power When Packet Activity on the PCI Express Link is Idle, Using Both L0s and L1 StatesSupport for D1, D2, D3hotNumber of Ports:OneExternalBilingualIEEE Std 1394b-2002Cable Port(with screw lock)Two Internal BilingualIEEE Std 1394b-2002Cable portsBus Power Connector:Big IDE 4-pin DC Power ConnectorIntroductionThe FWB-PCIE1X20 combines an OHCI (Open Host Controller Interface) and a high-performance, standards-compliant PCI Express 1.1 host system interface to provide S800 1394b-2002 compliant throughput in a small PCB (Printed Circuit Board) and low power dissipation.MultipleVCs (Virtual Channels) on the PCI Express link provide native support for QoS (Quality of Service) transmission for real-time and multimedia applications in a standards-based framework, ensuring compatibility with current and future operating systems. Active-state power management allows dynamic power management during periods of reduced network activity.Technical SpecificationsPCI Express:Designed for compliance with PCI Express.Multiple virtual channel (VC0,VC1 ) support fordiffe-rentiating 1394 isochronous traffic.Supports eight user-programmable traffic classes.64-bit and 32-bit platform support.Interrupts via legacy INTx interface or message sig-naled interrupt (MSI).Supports PCI Express clock power management viaCLKREQN signal for form factors that support thisprotocol.Supports all linkpowermanagement states (L0,L0s,L1,andL2/L3) and active state power management(ASPM).Supports wake-up from a low-power state via in-bandbeacon signaling and side-band WAKE_N signal.OHCI (Open Host Controller Interface)Enhanced with the OHCI 1.2 draft specification for 1394b-2002 PHY full operational compliance.OHCI 1.0 backwards compatible. Configurable via EEPROM to operate in either OHCI 1.0 or OHCI 1.1 mode.8 Kbyte isochronous transmit FIFO.4 Kbyte asynchronous transmit FIFO.8 Kbyte isochronous receive FIFO.8 Kbyte asynchronous receive FIFO.Dedicated asynchronous and isochronous descriptor-based DMA engines.Eight isochronous transmit contexts.Eight isochronous receive contexts.Supports parallel processing of incoming physical read and write requests.Supports up to 48-bit addressing per OHCI specifica-tion for the physical DMA transfers.1394b-2002 LinkCycle master and isochronous resource manager capable.Supports 1394a-2000 and 1394b-2002 acceleration features.1394b-2002 PHYProvides three IEEER 1394b-2002 compliant ports sup-porting 1394b-2002 speeds of 800 Mbits/s and 400Mbits/s while maintaining backward compatibility to IEEE 1394a-2000 speeds of 100 Mbits/s, 200Mbits/s, and 400 Mbits/s over 4.5 m copper.Fully supports provisions of IEEE 1394a-2000 and 1394-1995 standards for high-performance serial bus.Link is not required for hub operation.Supports extended BIAS_HANDSHAKE time for enhanced interoperability with camcorders.Does not require external filter capacitor for PLL.Supports arbitrated short bus reset to improve utiliza-tion of the bus.Supports ack-accelerated arbitration and fly-by concat-enation.Supports PHY pinging and remote PHY access pack-ets.Fully supports suspend/resume.Reports cable power fail interrupt when voltage at CPS ball falls below 7.5 V.Number of Ports:TwoExternal Bilingual ports with Screw Holes forthumbscrew lockingType 1394b CableOne Internal Bilingual portBus Power Connector:Big IDE 4-pin DC Power Connector

产品特点：

全面兼容 PCI Express Revision 1.1

支持高级错误报告性能

支持 L0s 及 L1 动态电源管理（ASPM）

灵活的可编程总线主控突破尺寸以及先进的内部判断控制优化总线利用

兼容 PCI 总线电源管理说明 v1.1及ACPI v2.0

支持 I2C EEPROM 包括1394 硬件配置

支持 EEPROM-less 设备的 EEPROM EEPROM

IEEE 1394 高速串联总线（通称的Firewire™）是一个领先的 PCI 对等互联系统，并被大众普遍视为数字音视频设备的主要接口。IEEE 1394a 配置支持与打印机、硬盘、多媒体设备及消费电子，如游戏控制器及视频摄像头等电脑外设的热插拔高速连接。

单晶片兼容 IEEE 1394a-2000, 1394-1995 及集成 2 个端口 PHY 功能的 1394a Open HCI 主机控制器

兼容 1394 Open HCI 说明 1.0 及 1.1

兼容 IEEE1394-1995 说明 1.0